Technical Program

DISPS-L1: Parallel and embedded signal processing systems

Session Type: Lecture
Time: Wednesday, March 28, 16:30 - 18:30
Location: Room C-2
Session Chairs: Jarmo Takala, Tampere University of Technology and Hiroshi Kawaguchi, Kobe University
 
DISPS-L1.1: PARALLEL VIDEO DECODING ON THE EMERGING HEVC STANDARD
         Mauricio Alvarez-Mesa; Technische Universität Berlin - Fraunhofer-Institute for Telecommunications Heinrich-Hertz-Institut
         Chi Ching Chi; Technische Universität Berlin
         Ben Juurlink; Technische Universität Berlin
         Valeri George; Fraunhofer-Institute for Telecommunications Heinrich-Hertz-Institut
         Thomas Schierl; Fraunhofer-Institute for Telecommunications Heinrich-Hertz-Institut
 
DISPS-L1.2: BIDIMENSIONAL MEDIAN FILTER FOR PARALLEL COMPUTING ARCHITECTURES
         Ricardo Sanchez; Pontificia Universidad Catolica del Peru
         Paul Rodriguez; Pontificia Universidad Catolica del Peru
 
DISPS-L1.3: LOOP SCHEDULING OPTIMIZATION FOR CHIP-MULTIPROCESSORS WITH NON-VOLATILE MAIN MEMORY
         Yan Wang; The University of Texas at Dallas
         Jiayi Du; The University of Texas at Dallas
         Jingtong Hu; The University of Texas at Dallas
         Qingfeng Zhuge; The University of Texas at Dallas
         Edwin Sha; The University of Texas at Dallas
 
DISPS-L1.4: POLAR FORMAT SYNTHETIC APERTURE RADAR IN ENERGY EFFICIENT APPLICATION-SPECIFIC LOGIC-IN-MEMORY
         Qiuling Zhu; Carnegie Mellon University
         Christian R. Berger; Marvell Semiconductor
         Eric Turner; University of California at Berkeley
         Larry Pileggi; Carnegie Mellon University
         Franz Franchetti; Carnegie Mellon University
 
DISPS-L1.5: PARAMETERIZED SCHEDULING FOR SIGNAL PROCESSING SYSTEMS USING TOPOLOGICAL PATTERNS
         Shenpei Wu; University of Maryland
         Chung-Ching Shen; University of Maryland
         Nimish Sane; University of Maryland
         Kelly Davis; University of Maryland
         Shuvra Bhattacharyya; University of Maryland
 
DISPS-L1.6: HIERARCHICAL RESAMPLING ARCHITECTURE FOR DISTRIBUTED PARTICLE FILTERS
         Ning Zheng; Zhejiang University
         Yun Pan; Zhejiang University
         Xiaolang Yan; Zhejiang University
         Ruohong Huan; Zhejiang University of Technology