| Paper: |
ITT-P1.6 |
| Session: |
Technology to Practice for Signal Processing |
| Location: |
Poster Area C |
| Session Time: |
Wednesday, March 28, 16:30 - 18:30 |
| Presentation Time: |
Wednesday, March 28, 16:30 - 18:30 |
| Presentation: |
Poster |
| Topic: |
|
| Paper Title: |
IMPLEMENTATION OF GENERALIZED DFT ON FIELD PROGRAMMABLE GATE ARRAY |
| Authors: |
Wes P. Weydig, Qualcomm Inc, United States; Mustafa U. Torun, Ali N. Akansu, New Jersey Institute of Technology, United States |
| Abstract: |
We introduce the implementation of Generalized Discrete Fourier Transform (GDFT) with nonlinear phase on a Field Programmable Gate Array (FPGA.) After briefly revisiting the GDFT framework, we apply the framework to a channel equalization problem in an Orthogonal Frequency Division Multiplexing (OFDM) communication system. The block diagram of the system is introduced and detailed explanations of the implementation for each block are given along with the necessary VHDL code snippets. The resource usage and registered performance of the design is reported and alternatives to improve the design in terms of performance and resolution are provided. To the best of our knowledge, this is the first hardware implementation of GDFT reported in the literature. |